1. Complete the module and system design of the chip according to the product definition.
2. Responsible for design documents, digital circuit structure and code design.
3. Assist verification engineers in digital circuit simulation, FPGA verification.Do the product testing, debugging and applications.
4. Complete the verification and formulation according to the product definition and design Spec, understand the design and formulate the test plan.
5. Develop and maintain module-level and chip-level verification environments, write test cases and implement verification plans.
6. Work closely with design engineers to perform white-box, gray-box verification and post-simulation.
7. Analyze coverage data, write related documents and verification reports.
1. Have more than 2 years of design experience in digital chips or SOC subsystems and be familiar with the chip development process.
2. Familiar with chip SOC embedded subsystem architecture analysis, system design, and verification experience.
3. Familiar with digital chip design languages such as Verilog, and have the ability to design complex synchronization and clock circuits.
4. Master the verification languages, verification tools and methods such as SysterVerilog/UVM/VMM, and write testbench for module verification;
5. Familiar with the Soc architecture based on the AMBA protocol, with good understanding of mixed signal circuits, high-speed interfaces such as Serdes, PCIE, ETH, DDR, and basic knowledge of signals and systems.
6. Majors in electronics, microelectronics and communications are preferred.
7. A solid theoretical basis for digital circuit design.
9. Good EDA tool capabilities (GVIM/DC/PT/Formality/VCS/NC/Verdi, etc.).
10. Good English skills.