Layout Enginner
Job Responsibilities:

1. Responsible for chip simulation layout layout design and verification, complete circuit module and full chip layout design.

2. Fully communicate with design engineers to ensure that they fully understand the layout requirements of the design and ensure that the circuit performance is optimized.

3. Perform layout verification in strict accordance with the requirements to ensure the quality of the layout.

4. Responsible for the writing of relevant delivery documents.

Job Requirements:

1. More than 3 years of simulation layout design experience, relevant experience is preferred.

2. Proficient in layout design process and main layout design tools.

3. Have experience in multi-voltage domain layout design.

4. Have a deep understanding of ESD and Latch-up design rules.

5. Those who can use scripts to optimize the design process are preferred.

6. Work proactive and responsible, with good team spirit and communication skills.

7. Familiar with 40nm and below process.